This invention relates to methods of manufacturing large crystalline and monocrystalline semiconductor-on-insulator composites, and integrated circuits utilizing such composites.
There has been substantial work done in an effort to grow device-worthy silicon crystals on insulating substrates to provide latch-up free integrated circuits having low sensitivity to ion radiation, low capacitance, and high packing density for very large scale IC's [Leamy, et al., "Laser Fabrication of Silicon on Dielectric Substrates" Proceedings of the Materials Research Society Annual Meeting, Boston, MA, Nov. 16-19, 1981, North-Holland, Amsterdam, Netherlands, pp. 459-504, 1982]. Typically, polysilicon or amorphous silicon is recrystallized on a layer of silicon dioxide through contact windows to a monocrystalline substrate. Such recrystallization has been accomplished by laser beam scanning and by the application of halogen lamps, in a scanning arrangement or by application to the entire wafer over an extended time period. Very close control of the temperature profile is a crucial parameter.
Patterned antireflection coatings have also been used to define single crystal island areas. A laser beam is then scanned parallel to the anti-reflective stripes thereby producing a single crystal silicon island between the antireflective strips [See e.g., J. P. Colinge, et al., "Use of Selective Annealing for Growing Very Large Grain Silcon-On-Insulator", Applied Physics Letter, Vol. 41, No. 14, pp. 346-347, August, 1982; J. P. Colinge, et al., "Transistors Made in Single-Crystal SOI Films", IEEE Electron Device Letters, Vol. EDL-4, No. 4, April, 1983]. Various methods for growing monocrystaline silicon on dielectric substrates or layers are described in the literature [G. K. Celler, et al., "Seeded Oscillatory Growth of Si over SiO.sub.2 by CW Laser Irradiation", Applied Physics Letter, Vol. 40, No. 12, June, 1983; C. M. Kyung, "Temperature Profile of a Silicon-On-Insulator Multilayer Structure in Silicon Recrystallization with Incoherent Light Source", IEEE Trans. Electron Devices, Vol. ED-31, No. 12, pp. 1845-1851, December 1984; T. Stultz, et al., "Beam Processing of Silicon with a Scanning CW Hg Lamp", Elsevier, N.Y., pp. d463-76, 1983; D. Bensahel, et al., "Localization of Defects on SOI Films via Selective Recrystallization Using Halogen Lamps", Electron Lett., Vol. 19, No. 13, pp. 464-466, June 23, 1983; H. J. Leamy, et al., "Laser Fabrication of Silicon on Dielectric Substrates" Proceedings of the Materials Research Society Annual Meeting, Boston, MA, Nov. 16-19, 1981, North-Holland, Amsterdam, Netherlands, pp. 459-504, 1982.
However, these techniques have various disadvantages in terms of cost, and/or device properties or quality. For example, laser scanning techniques are costly and present difficulty in obtaining high quality single crystal silicon near the edges of the beam. In addition, overlapped successive scans can destroy the single crystal produced by the earlier scans causing random nucleation in the overlap region.
Scanning or relatively slow heating of the amorphous or polysilicon layer by means of halogen lamps, tends to cause warping of the wafers, induces stress and imperfections in the recrystallized materials and permits impurity diffusion to the monocrystalline silicon.
In addition, formation of conventional semiconductor wafers of monocrystalline semiconductor material is severely size limited. The formation of large area, single crystal, or large crystal thin films upon suitable substrates, such as glass or fused quartz would be desirable for uses such as integrated circuits, display panels, and photoelectric power generating devices.
Accordingly, it is an object of the present invention to provide improved methods for manufacturing monocrystalline seeded semiconductor-on-insulator devices and structures, as well as the devices and structures themselves. It is a further object to provide economical methods for producing highly crystalline seminconductor surfaces for large area use such as solar power cells. It is a further object to provide improved integrated circuit and other semiconductor electronic devices. These and other objects will be apparent from the following drawings and description.